The present invention generally pertains to the field of computer networking. More particularly, the present invention pertains to power management in a network adapter with more than one power source, such as a network adapter equipped with remote wakeup capability.
A computer system""s functionality is dramatically enhanced by coupling stand-alone computers together to form a computer network. In a computer network, users may readily exchange files, share information stored on a common database, pool resources, and communicate via e-mail and video teleconferencing. Another advantage of computer networks is that they can be accessed from remote locations via a modem or various other types of communication equipment.
One popular type of computer network is known as a local area network (LAN). LANs connect multiple computers together such that the users of the computers can access the same information and share data. Typically, in order to be connected to a LAN, a general purpose computer requires a peripheral device generally known as a network adapter or network interface card (NIC). Essentially, the NIC works with the operating system and central processing unit (CPU) of the host computer to control the flow of information over the LAN. NICs may also be used to connect a computer to the Internet.
Remote access to a computer network (e.g., a LAN) is facilitated by providing the capability to start or wake up a computer from a remote location. This feature is advantageous to a user desiring access to a computer from a remote location. This feature is also advantageous to a network administrator, allowing the administrator to perform, for example, maintenance activities on a computer system from a remote location.
A standard has been developed for allowing a networked computer which is in sleep mode to be awakened. More specifically, Advanced Micro Devices (AMD) of Santa Clara, Calif., has developed a technology referred to as the Magic Packet technology. In the Magic Packet technology, assuming, for example, that an Ethernet controller is running and communicating with the network, the computer""s power management hardware or software puts the Ethernet controller into the Magic Packet mode prior to the system going to sleep. Once in the sleep mode, the computer will be awakened when a Magic Packet is detected. That is, incoming data will be monitored until the specific sequence comprising the Magic Packet is detected. The Magic Packet technology and the associated standard (generally referred to as the Wakeon LAN standard) are well known in the art.
Accordingly, some NICs are designed to detect a Magic Packet and to awaken the computer (or selected components within the computer) in response. These NICs are typically connected in a standard fashion to the computer (e.g., to the computer""s motherboard) via a bus such as a PCI (peripheral component interconnect) bus. These NICs also are connected to the motherboard via a separate cable (e.g., a remote wakeup cable). Thus, NICs that provide a remote wakeup capability typically have a primary power source from the motherboard and an auxiliary power source from the remote wakeup cable. When the computer is powered on and awake, power to the NIC is provided over the PCI bus from the primary power source, typically five volts (5V). When the computer system is in the sleep mode, power to the NIC is provided over the remote wakeup cable from the auxiliary power source, typically also 5V. Therefore, when a Magic Packet is received, the NIC will have power and hence the ability to wake up. The NIC also can then send a PME (power management event) signal via the remote wakeup cable to wake up the computer.
The prior art is problematic because the presence of more than one power source can cause a power contention issue. If power is being provided by one source (for example, by the auxiliary power source), it is not necessary for the other source (in this case, the primary power source) to provide power. In fact, using power concurrently from both sources may cause damage to some of the components in the NIC. Also, switching to different power sources during the power down mode can cause faults in the NIC.
This problem is aggravated if an additional power source is introduced. For example, revision 2.2 of the PCI specification (xe2x80x9cPCI 2.2xe2x80x9d) requires the addition of another auxiliary power source. In accordance with PCI 2.2, pin A14 of the PCI bus provides a 3.3V auxiliary power source to the NIC. Thus, a NIC with remote wakeup capability and adapted to accommodate an additional auxiliary power source (such as that specified by PCI 2.2) can have three power sources, aggravating the power contention issue described above.
Thus, a need exists for a device or method that addresses the power contention problem so that components do not inadvertently receive power from more than one source when multiple power sources are present in a peripheral device (such as a NIC). A need also exists for a device or method that addresses the above need and can be applied to a legacy device (such as a NIC) to allow the legacy device to accommodate additional power sources (such as that specified in PCI 2.2). A further need exists for a device or method that addresses the above needs and allows the peripheral device to select one power source versus another depending on the mode in which the computer and peripheral device are currently operating (e.g., sleep mode versus awake). The present invention provides a novel solution to these needs.
The present invention provides a device and method thereof that address the power contention problem so that components do not inadvertently receive power from more than one source when multiple power sources are present in a peripheral device (such as a network interface card [NIC]). The present invention also provides a device and method thereof that can be applied to a legacy device (such as a NIC) to allow the legacy device to accommodate additional power sources (such as that specified in revision 2.2 of the PCI specification). The present invention also provides a device and method thereof that allow the peripheral device to select one power source versus another depending on the mode in which the computer and peripheral device are currently operating (e.g., sleep mode versus awake).
Specifically, in one embodiment of the present invention, the circuit and method thereof arbitrate between a plurality of power sources connected to a computer system peripheral device. The circuit includes a first circuit subassembly coupled to a first power source and a second power source. The first circuit subassembly conducts current from the first power source when power is not available from the second power source, and otherwise conducts current from the second power source.
In the present embodiment, the circuit also includes a second circuit subassembly coupled between the first circuit subassembly and a third power source. The second circuit subassembly conducts current from the third power source when the third power source is available and otherwise conducts current from the first circuit subassembly. The second circuit subassembly comprises a first component, a second component and a third component.
In the present embodiment, the first component is coupled to the third power source and the first circuit subassembly. The first component conducts current from the first circuit subassembly when power is not available from the third power source and otherwise substantially does not conduct current. The second component is coupled to the third power source and the first component. The second component conducts current from the first component when power is available from the third power source and otherwise substantially does not conduct current. The third component is coupled to the first component, the second component and the third power source. The third component conducts current from the third power source when power is available from the third power source.
In one embodiment, a fourth component is coupled to the first component, the second component and the first circuit subassembly. The fourth component conducts current from the first circuit subassembly when power is available from the third power source and otherwise substantially does not conduct current. Also, a fifth component is coupled to the second component and the fourth component. The fifth component conducts current from the fourth component when power is not available from the third power source and otherwise substantially does not conduct current. In addition, a sixth component is coupled to the fourth component and the first circuit subassembly. The sixth component conducts current from the first circuit subassembly when power is not available from the third power source and otherwise substantially does not conduct current.
In one embodiment, the first circuit subassembly includes a seventh component coupled between the first (e.g., primary) power source and the second (e.g., auxiliary) power source. The seventh component conducts current from the first power source when power is not available from the second power source. An eighth component integral with the seventh component conducts current from the first power source in combination with the seventh component and substantially prevents current from flowing from the second power source to the first power source. Thus, in this embodiment, power from the second power source is used when power is available from the second power source, and otherwise power from the first power source is used.
In one embodiment, the first component, second component, third component, fourth component, fifth component and sixth component are transistors, specifically, field effect transistors (FETs). In one embodiment, the seventh component is a FET and the eighth component is a diode.
In one embodiment, the first power source is a five volt (5V) source connected to the peripheral device via a peripheral component interconnect (PCI) bus, the second power source is an auxiliary 5V source connected to the peripheral device via a remote wakeup cable, and the third power source is an auxiliary 3.3V source connected to the peripheral device substantially in accordance with PCI specification revision 2.2.
These and other advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures.